XMSRC4194-VC1¶

1. Introduction¶

1.1 Product Description¶

XMSRC4194 is a high-performance 4-channel asynchronous sample rate converter based on XMOS chip architecture. The product is fully compatible with the core functional specifications of SRC4194, including 16:1 to 1:16 wide-range sample rate conversion, 144dB dynamic range, and comprehensive support for various digital audio formats such as I2S, Left-justified, Right-justified, and TDM.

• Compared to SRC4194, the core advantage of XMSRC4194 is the integration of two additional S/PDIF input interfaces, providing users with more flexible signal source selection. Users can flexibly switch between I2S input and S/PDIF input according to application requirements, significantly enhancing system connectivity and adaptability.
• The XMOS chip architecture ensures high reliability and excellent audio processing performance, providing professional audio equipment manufacturers with a more competitive solution.
• Dual SRC module architecture, with each module processing 2 audio channels, can operate independently, enabling simultaneous processing of 4-channel audio sample rate conversion.

1.2 Product Features¶

1.3 Application Scenarios¶

1.4 Product Block Diagram¶

1.5 Ordering Information¶

2. Modes and Specifications¶

2.1 Supported Input-Output Modes¶

XMSRC4194-VC1 employs a flexible modular design where two SRC modules (SRC_A and SRC_B) can be independently configured for input sources. The following lists typical application modes:

2.2 Detailed Parameters for Each Operating Mode¶

2.2.1 Mode 1: Dual S/PDIF Input → Dual I²S Output¶

Application Scenario: S/PDIF signal conversion to dual I²S output, suitable for digital audio systems

Signal Flow:

S/PDIF_A ──→ SRC_A ──→ I²S_A_OUT (Master)
S/PDIF_B ──→ SRC_B ──→ I²S_B_OUT (Master)

Parameter Configuration:

2.2.2 Mode 2: Dual I²S Input → Dual I²S Output¶

Application Scenario: Independent dual-channel sample rate conversion, suitable for multi-track recording equipment

Signal Flow:

I²S_A_IN (Slave) ──→ SRC_A ──→ I²S_A_OUT (Master)
I²S_B_IN (Slave) ──→ SRC_B ──→ I²S_B_OUT (Slave)

Parameter Configuration:

2.2.3 TDM Cascade Mode (Mode ¾)¶

Application Scenario: Multi-device cascading, suitable for professional multi-channel audio systems

TDM Frame Format: - Frame rate = output sample frequency (fs) - Bit clock frequency (BCKO) = N × 64fs (N = number of cascaded devices) - Each subframe = 64 bits (left channel 32 bits + right channel 32 bits) - Audio data left-aligned, MSB first

Cascade Capability:

Number of cascaded devices = (BCKO frequency / fs) / 64
Maximum BCKO = 27MHz
Maximum fs = 212KHz

Typical Configuration Examples:

2.3 Audio Performance Specifications¶

2.4 Feature Comparison¶

3. Pin Configuration and Functions¶

3.1 XMSRC4194_VC1 Pin Layout¶

3.2 XMSRC4194_VC1 Pin Description¶

4. Configuration Interface Description¶

4.1 I²C/UART Configuration Interface¶

XMSRC4194-VC1 supports both I²C and UART dual-protocol configuration, providing flexible configuration methods. The UART_I2C_SEL signal on pin 22(X0D31) can be used to select which configuration interface to use:

4.2 Configurable Parameters¶

The following parameters can be configured via I²C or UART interface:

4.3 MCLK Configuration¶

• Master mode ports require MCLK for generating LRCK and BCK:
• MCLK supports 128fs/256fs/512fs/1024fs

5. Hardware Parameters¶

5.1 Normal Operating Conditions¶

5.2 Product Dimensions¶

13±0.1mm(L)X13±0.1mm(W)X0.8±0.1mm(H)

5.3 Module Package Diagram¶

6. Minimum System Reference Design¶

7. Product Packaging Information¶

Tray + Outer Box Packaging

8. Revision History¶

9. Contact and Feedback¶